/**
  ******************************************************************************
  * @file    Libraries/Device/TS32Fx/TS32Fx_LL_Driver/inc/ts32fx_ll_spi_iic.h
  * @author  TOPSYS Application Team
  * @version V1.0.0
  * @date    02-11-2018
  * @brief   This file contains all the SPI_IIC LL firmware functions.
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; COPYRIGHT 2018 TOPSYS</center></h2>
  *
  *
  *
  ******************************************************************************
  */ 
  
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __TS32FX_LL_SPI_IIC_H
#define __TS32FX_LL_SPI_IIC_H

#ifdef __cplusplus
 extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/
#include "ts32fx.h"
     
/** @addtogroup TS32Fx_StdPeriph_Driver TS32Fx Driver
  * @{
  */
     
/** @addtogroup spi_iic_interface_gr SPI_IIC Driver
  * @ingroup  TS32Fx_StdPeriph_Driver
  * @{
  */ 
     
/** @addtogroup SPI_IIC_LL_Driver SPI_IIC LL Driver
  * @ingroup  spi_iic_interface_gr
  * @brief Mainly the driver part of the SPI_IIC module, which includes \b SPI_IIC \b Register 
  * \b Constants, \b SPI_IIC \b Exported \b Constants, \b SPI_IIC \b Exported \b Struct, \b SPI_IIC
  * \b Data \b transfers \b functions, \b SPI_IIC \b Initialization \b and \b SPI_IIC \b Configuration 
  * \b And \b Interrupt \b Handle \b function.
  * @{
  */
     
/* Exported types ------------------------------------------------------------*/

/* Exported constants --------------------------------------------------------*/
     
/** @defgroup SPI_IIC_LL_Register_Constants SPI_IIC LL Register Constants
  * @ingroup  SPI_IIC_LL_Driver
  * @brief    SPI_IIC LL register constant table definition
  *
@verbatim   
  ===============================================================================
                                Register Constants
  ===============================================================================  
  
    Register Constants mainly encapsulates each bit in each group in the SPI_IIC 
    register. In the process of configuration, the macro definition can be directly 
    called to configure the SPI_IIC register, mainly for convenience. Understand the 
    configuration of the SPI_IIC.
    
@endverbatim
  *
  * @{
  */

/***** SPI CON0(SPI Config Register) *****/
/*! SPI SLAVE SPI_NSS pin rising edge interrupt en  
 * 0: disable  
 * 1: enable  
 */
#define LL_SPI_CON0_CS_RISING_EDGE_IE               (1UL << 13)
/*! SPI_NSS pin enable,this bit is valid only in SPI mode  
 * 0: disable,SPI bus no NSS pin  
 * 1: enable, SPI bus has NSS pin  
 */
#define LL_SPI_CON0_CS_EN                           (1UL << 12)
/*! SPI NSS pin control output, this bit is valid only in SPI master mode  
 * 0: output low  
 * 1: output high  
 */
#define LL_SPI_CON0_CS_SET                          (1UL << 11)
/*! SPI MASTER MODE,capture serial data delay cycle :  
 * 3'd0: no delay  
 * 3'd1: delay 1 cycle  
 * 3'd2: delay 2 cycle  
 * ...
 * 3'd7: delay 7 cycle  
 */
#define LL_SPI_CON0_RXSEL_SET(n)                    ((n & 0x07) << 8)
/*! SPI SLAVE mode, need sync input data en  
 * 0: disable  
 * 1: enable  
 */
#define LL_SPI_CON0_SLAVE_SYNC_EN                   (1UL << 7)
/*! SPI MASTER mode, need sync input data en  
 * 0: disable  
 * 1: enable  
 */
#define LL_SPI_CON0_MASTER_SYNC_EN                  (1UL << 6)
/*! Data Frame Size set  
 * 00: 08 bit  
 * 01: 16 bit  
 * 10: 24 bit  
 * 11: 32 bit  
 */
#define LL_SPI_CON0_FRAME_SIZE_SET(n)               ((n & 0x03) << 4)
/*! Data Frame Size get  
 * 00: 08 bit  
 * 01: 16 bit  
 * 10: 24 bit  
 * 11: 32 bit  
 */
#define LL_SPI_CON0_FRAME_SIZE_GET(p_spi)           (((p_spi)->CON0 >> 4) & 0x03)
/*! SPI wire mode mark
 */
#define LL_SPI_CON0_WIRE_MODE_MASK                  (0x03 << 2)
/*! SPI wire mode set  
 * 00: normal mode  
 * 01: 3 wire mode  
 * 10: dual mode  
 * 11: quad mode  
 */
#define LL_SPI_CON0_WIRE_MODE_SET(n)                ((n & 0x03) << 2)
/*! SPI wire mode get  
 * 00: normal mode  
 * 01: 3 wire mode  
 * 10: dual mode  
 * 11: quad mode  
 */
#define LL_SPI_CON0_WIRE_MODE_GET(p_spi)            (((p_spi)->CON0 >> 2) & 0x03)
/*! SPI mode select  
 * CPOL CPHA  
 * 00: mode 0 :clk idle 0, first rising edge sampling, second falling edge output data  
 * 01: mode 1 :clk idle 0, second falling edge sampling, first rising edge output data  
 * 10: mode 2 :clk idle 1, first falling edge sampling, second rising edge output data  
 * 11: mode 3 :clk idle 1, second rising edge sampling, first falling edge output data  
 */
#define LL_SPI_CON0_MODE_SET(n)                     ((n & 0x03) << 0)


/***** IIC CON0(IIC Config Register) *****/
/*! IIC receive nack interrupt en  
 * 0: disable  
 * 1: enable  
 */
#define LL_IIC_CON0_NACK_IE                         (1UL << 22)
/*! IIC master lose arbitrament interrupt en  
 * 0: disable  
 * 1: enable  
 */
#define LL_IIC_CON0_AL_IE                           (1UL << 21)
/*! IIC master or slave detected stop signal interrupt en  
 * 0: disable  
 * 1: enable  
 */
#define LL_IIC_CON0_STOP_IE                         (1UL << 20)
/*! IIC slave address matched interrupt en  
 * 0: disable  
 * 1: enable  
 */
#define LL_IIC_CON0_ADDR_MATCH_IE                   (1UL << 19)
/*! IIC filter cnt  
 * sampling scl and sda every (I2C_FILTER_CNT +1) iic clk  
 * I2C_FILTER_CNT value is greater the width of filter burr is greater  
 */
#define LL_IIC_CON0_FILTER_CNT_SET(n)               ((n & 0x1F) << 14)
/*! IIC broadcast interrupt en  
 * 0: disable  
 * 1: enable  
 */
#define LL_IIC_CON0_BROADCAST_IE                    (1UL << 13)
/*! IIC slave receive broadcase interrupt en  
 * 0: ignore broadcast address  
 * 1: respond ack when received broadcast, and hardware set  BROADCAST_PEND,and can occur interrupt  
 */
#define LL_IIC_CON0_BROADCAST_EN                    (1UL << 12)
/*! IIC as slave, set slave address
 */
#define LL_IIC_CON0_SLAVE_ADRR_SET(n)               ((n & 0x3FF) << 2)
/*! IIC response ack or nack when receive data  
 * 0: ACK  
 * 1: NACK  
 */
#define LL_IIC_CON0_TX_NACK_EN                      (1UL << 1)
/*! IIC as slave, slave address width  
 * 0: 7bit  
 * 1: 10bit  
 */
#define LL_IIC_CON0_SLAVE_ADR_WIDTH_SET(n)          ((n & 0x01) << 0)


/***** SSP CON1(SSP Config Register) *****/
/*! DMA finish interrupt en  
 * 0: disable  
 * 1: enable  
 */
#define LL_SSP_CON1_DMA_IE                          (1UL << 9)
/*! buf overflow data lost interrupt en  
 * 0: disable  
 * 1: enable  
 */
#define LL_SSP_CON1_FIFO_OV_IE                      (1UL << 8)
/*! receive buf not empty interrupt en  
 * 0: disable  
 * 1: enable  
 */
#define LL_SSP_CON1_RFIFO_NOT_EMPTY_IE              (1UL << 7)
/*! send buf not full interrupt en  
 * 0: disable  
 * 1: enable  
 */
#define LL_SSP_CON1_TFIFO_NOT_FULL_IE               (1UL << 6)
/*! SPI or IIC interface  
 * IIC master: receive or send finish one frame of data(START + WRITE/READ(8bit+ack) + STOP) interrupt en  
 * IIC slave: receive or send finish one frame of data(8bit+ack) interrupt en  
 * 0: disable  
 * 1: enable  
 */
#define LL_SSP_CON1_DONE_IE                         (1UL << 5)
/*! DMA en(SSP_TX_EX_EN==1 is dma send, SSP_TX_EX_EN==0 is dma receive)  
 * 0: disable  
 * 1: enable  
 */
#define LL_SSP_CON1_DMA_EN                          (1UL << 4)
/*! interface send or receive en  
 * 0: rx en  
 * 1: tx en  
 */
#define LL_SSP_CON1_TX_EN                           (1UL << 3)
/*! interface master or slave mode set  
 * 0: master  
 * 1: slave  
 */
#define LL_SSP_CON1_MODE_SET(n)                     ((n & 0x01) << 2)
/*! interface iic or spi module en  
 * 0: spi  
 * 1: iic  
 */
#define LL_IIC_CON1_MODULE_EN                       (1UL << 1)
/*! module en  
 * 0: disable  
 * 1: enable  
 */
#define LL_SSP_CON1_EN                              (1UL << 0)


/*****IIC CMD_DATA(IIC CMD_DATA Config Register) *****/
/*! iic stop bit en(byte + stop,only master mode)  
 * 0: disable  
 * 1: enable  
 */
#define LL_IIC_CMD_DATA_STOP_BIT_EN                 (1UL << 9)
/*! iic start bit en(start + byte,only master mode)  
 * 0: disable  
 * 1: enable  
 */
#define LL_IIC_CMD_DATA_START_BIT_EN                (1UL << 8)

/*****SPI IIC STA(SPI IIC STA Config Register) *****/  
/*! slave mode, slave by addressing, ro  
 * 0: addressing  
 * 1: no addressing  
 */
#define LL_IIC_STA_SLAVE_ADDRED                     (1UL << 27)
/*! I2C STATE, ro  
 *                MASTER                      SLAVE  
 * 000: IDLE      IDLE                        IDLE  
 * 001: START     sending START               has received START, waiting for SCL to change to 0  
 * 010: TX        sends 1byte data            send 1byte data  
 * 011: RX        receives 1byte data         receives 1byte data  
 * 100: STOP      send STOP                   no use  
 * 101: ADR0      no use                      waits to receive 1byte address  
 * 110: ADR1      no use                      waits for the first 2byte address  
 * 111: no use  
 */
#define LL_IIC_STA_STATE_GET(n)                    (((n) >> 24) & 0x07)
/*! clear buf count, wo  
 * Write 1: clear BUF_CNT  
 * Write0: nothing  
 * Read: always returns 0  
 */
#define LL_SSP_STA_CLR_FIFO_CNT_EN                 (1UL << 19)
/*! buf count, ro  
 * How much byte valid data is in the buffer.  
 * CPU reads (RX_EN)/ writes (TX_EN) CMD_DATA register once, subtracts/adds a frame data width.  
 * 8bit data subtracts/adds 1,16 bit data subtracts/adds 2,24 bit data subtracts and 32bit data subtracts/adds 4.  
 */
#define LL_SSP_STA_FIFO_CNT_GET(n)                 (((n )>> 16) & 0x07)
/*! master mode rx busy  
 * In MASTER read slave mode, indicates whether the continuous reading of DMA_LEN byte data by the software configuration is complete.  
 * 0: finished  
 * 1: still not finished  
 */
#define LL_IIC_STA_MASTER_RX_BUSY_PENDING          (1UL << 15)
/*! IIC master or slave rx nak  
 * When sending data to I2C host or slave, NACK was detected in the 9bit handshake phase  
 * 0: ACK  
 * 1: NACK  
 */
#define LL_IIC_STA_RX_NACK                         (1UL << 14)
/*! IIC slave rx w/r sign from master  
 * I2C slave, in the address phase, received from the host to read and write the sign  
 * 0: the host will write the slave  
 * 1: the host will read the slave  
 */
#define LL_IIC_STA_SLAVE_RW                        (1UL << 13)
/*! I2C line busy sign, ro  
 * 0: START has not appeared on the line, or STOP appears after START, and the line is free.  
 * 1: it was detected that START appeared on the line, and STOP did not appear until now. The line was busy.  
 * Note: hardware only  
 */
#define LL_IIC_STA_BUS_BUSY_PENDING               (1UL << 12)
/*! SPI SLAVE, state of CS, ro
 */
#define LL_SPI_STA_SLAVE_CS_STATE                 (1UL << 11)
/*! SPI or IIC busy, ro  
 * 0: MASTER free SLAVE is not sending data and is not used when receiving.  
 * 1: MASTER is receiving or sending a frame of data. SLAVE is sending a frame of data and is not used when receiving.  
 * Note: hardware cleaning, or turning off SPI and I2C (CON1[0]==0), or CLR_BUF_CNT will clear SSP_BUSY simultaneously in slave.  
 */
#define LL_SSP_STA_BUSY_PENDING                   (1UL << 10)
/*! I2C host, detected arbitration loss pending, rc  
 * 0: no arbitration lost  
 * 1: loss of arbitration  
 * Note: only the software clear the pending, and I2C can work properly  
*/
#define LL_IIC_STA_AL_PENDING                     (1UL << 9)
/*! I2C interface, detected a STOP bit on the line pending, rc  
 * 0: no STOP bit detected.  
 * 1: STOP bit detected.  
 * Note: software clear only  
 */
#define LL_IIC_STA_STOP_PENDING                   (1UL << 8)
/*! I2C slave, receiving the correct slave address sent from the host pending, rc.  
 * 0: address of slave does not match  
 * 1: slave address matching  
 * Note: software clear only  
 */
#define LL_IIC_STA_ADDR_MATCH_PENDING             (1UL << 7)
/*! I2C slave, the broadcast address marker is detected pending, rc  
 * 0: no broadcast address detected  
 * 1: broadcast address detected  
 * Note: software clear only  
*/
#define LL_IIC_STA_BROADCAST_PENDING              (1UL << 6)
/*! The rising edge of SPI NSS was detected pending, rc  
 * 0: no rising edge detected  
 * 1: detected rising edge  
 * Note: software clear only  
 */
#define LL_SPI_STA_CS_RISING_EDGE_PENDING         (1UL << 5)
/*! DMA Send or receive completion flag pending, rc  
 * 1: DMA is complete  
 * 0: DMA is not completed  
 * Note: software clear only  
 */
#define LL_SSP_STA_DMA_DONE_PENDING               (1UL << 4)
/*! Buffer overflowed and data was lost pending, rc  
 * 0: buffer is not overflowed  
 * 1: the buffer capacity is full (the buffer capacity is 5byte, and the full capacity is not necessarily 5byte, but the space can not hold a frame of data),  
 * and another data is received.Discard the later data.  
 * Note: software clear only  
 */
#define LL_SSP_STA_FIFO_OV_PENDING                (1UL << 3)
/*!Buffer empty sign, ro  
 * 0: no empty  
 * 1: empty  
 */
#define LL_SSP_STA_FIFO_EMPTY_PENDING             (1UL << 2)
/*!Buffer full sign, ro  
 * 0: no full  
 * 1: full  
 */
#define LL_SSP_STA_FIFO_FULL_PENDING              (1UL << 1)
/*! SPI or IIC receiving or sending has completed pending, rc  
 * 0: not complete  
 * 1: SPI interface:  
 * SPI has completed the receiving or sending of a frame (8bit/16bit/24bit/32bit) of data  
 *    The I2C interface:  
 * I2C MASTER has completed receiving or sending a frame of data (START (optional) + WRITE/READ (8bit+ack) + STOP (optional))  
 * I2C SLAVE has completed receiving or sending a frame of data (8bit+ack)  
 * Note: software clear only  
 */
#define LL_SSP_STA_DONE_PENDING                   (1UL << 0)

/*******************IIC FLAG*****************************/
#define LL_IIC_NONE_FLAG                          0
#define LL_IIC_START_FLAG                         (1UL << 0)
#define LL_IIC_STOP_FLAG                          (1UL << 1)
#define LL_IIC_NACK_FLAG                          (1UL << 2)



/**
  * @}
  */

/** @defgroup SPI_IIC_LL_Exported_Constants SPI_IIC LL Exported Constants
  * @ingroup  SPI_IIC_LL_Driver
  * @brief    SPI_IIC LL external constant definition
  *
@verbatim   
  ===============================================================================
                                Exported Constants
  ===============================================================================  
  
    Exported Constants mainly restricts the partial configuration of the abstraction 
    layer by using the form of enumeration to facilitate the use and understanding of 
    the module configuration. For the specific enumeration meaning, please refer to 
    the annotation of each module.

@endverbatim
  *
  * @{
  */
/***** DRIVER API *****/


/***** LL API *****/

/** @defgroup SPI_Exported_Enum_Typedefs SPI Exported Enum Typedefs
  * @{
  */
  
/**
  * @brief Enumeration constant for SSP module select
  */
typedef enum {
    /*! spi module en
     */
    LL_SSP_SPI_EN          = 0,
    /*! iic module en
     */
    LL_SSP_IIC_EN          = 1,
} TYPE_ENUM_LL_SSP_MODULE_SEL;

/**
  * @brief Enumeration constant for SSP work mode
  */
typedef enum {
    /*! ssp master mode
     */
    LL_SSP_MASTER_MODE     = 0,
    /*! ssp slave mode
     */
    LL_SSP_SLAVE_MODE      = 1,
} TYPE_ENUM_LL_SSP_WORK_MODE;

/**
  * @brief Enumeration constant for SSP rx tx direction
  */
typedef enum {
    /*! ssp tx
     */
    LL_SSP_TX              = 0,
    /*! ssp rx
     */
    LL_SSP_RX              = 1,
} TYPE_ENUM_LL_SSP_DIRECTION;

/**
  * @brief SPI wire mode enum type, consistent with the spec definition
  */
typedef enum {
    /*! spi normal data mode
     */    
    LL_SPI_NORMAL_MODE     = 0,
    /*! spi three wire data mode
     */ 
    LL_SPI_THREE_WIRE_MODE = 1,
    /*! spi dual wire data mode
     */ 
    LL_SPI_DUAL_MODE       = 2,
    /*! spi quad wire data mode
     */ 
    LL_SPI_QUAD_MODE       = 3,
} TYPE_ENUM_LL_SPI_WIRE_MODE;

/**
  * @brief SPI mode enum type, consistent with the spec definition.
  * @note LL_SPI_MODE_0 represents the first valid rising edge to start data acquisition.  
  *       LL_SPI_MODE_1 represents the second valid falling edge to start data acquisition.  
  *       LL_SPI_MODE_2 represents the first valid falling edge to start data acquisition.  
  *       SLL_PI_MODE_3 represents the second valid rising edge to start data acquisition.  
  */
typedef enum {
    /*! spi mode 0
     */
    LL_SPI_MODE_0          = 0,
    /*! spi mode 1
     */
    LL_SPI_MODE_1          = 1,
    /*! spi mode 2
     */   
    LL_SPI_MODE_2          = 2,
    /*! spi mode 3
     */
    LL_SPI_MODE_3          = 3,
} TYPE_ENUM_LL_SPI_MODE;

/**
  * @brief SPI data frame size enum type, consistent with the spec definition.  
  *        The spi data frame size represents the number of bits of data sent by the spi  
  *        module each time.
  */
typedef enum {
    /*! spi 8bit data
     */
    LL_SPI_8_BIT           = 0,
    /*! spi 16bit data
     */
    LL_SPI_16_BIT          = 1,
    /*! spi 24bit data
     */
    LL_SPI_24_BIT          = 2,
    /*! spi 32bit data
     */
    LL_SPI_32_BIT          = 3,
} TYPE_ENUM_LL_SPI_FRAME_SIZE;


/**
  * @}
  */

/** @defgroup IIC_Exported_Enum_Typedefs IIC Exported Enum Typedefs
  * @{
  */

/**
  * @brief IIC data response enum type, consistent with the spec definition.  
  */
typedef enum {
    /*! iic response ack
     */
    LL_IIC_ACK                 = 0,
    /*! iic response nack
     */
    LL_IIC_NACK                = 1,
} TYPE_ENUM_LL_IIC_ACK;

/**
  * @brief IIC  address width enum type, consistent with the spec definition.  
  */
typedef enum {
    /*! iic address 7bit
     */
    LL_IIC_ADDR_7BIT           = 0,
    /*! iic address 10bit
     */
    LL_IIC_ADDR_10BIT          = 1,
} TYPE_ENUM_LL_IIC_ADDR_WIDTH;

/**
  * @brief IIC response enum type.  
  */
typedef enum {
    /*! iic no response
     */
    LL_IIC_NO_RESPONSE         = 0,
    /*! iic read
     */
    LL_IIC_READ                = 1,
    /*! iic write
     */
    LL_IIC_WRITE               = 2,
} TYPE_ENUM_LL_IIC_ADDR_RESPONSE;


/**
  * @}
  */

/***** LL API AND DRIVER API *****/

/**
  * @}
  */

/** @defgroup SPI_IIC_LL_Exported_Struct SPI_IIC LL Exported Struct
  * @ingroup  SPI_IIC_LL_Driver
  * @brief    SPI_IIC LL external configuration structure definition
  *
@verbatim   
  ===============================================================================
                                Exported Struct
  ===============================================================================  

    Exported Struct mainly extracts the SPI_IIC registers from the API, and abstracts 
    the structure. As long as it implements the low coupling between the registers 
    and the registers, the user only needs to configure the structure of the abstraction 
    layer and call hal_spi_iic_init. Function, you can configure the SPI_IIC module without 
    involving the configuration of the collective register.

@endverbatim
  *
  * @{
  */

/** @defgroup SPI_Exported_Struct_Typedefs SPI Exported Struct Typedefs
  * @{
  */


/**
  * @brief SPI low layer dma initialization configuration structure
  */
typedef struct __ll_spi_dma_cfg {
    /*! dma rx tx data buf address                                              */
    u32                         dma_addr;
    /*!  dma rx tx data size                                                    */
    u16                         dma_size;
    /*! dma rx tx direction                                                     */
    TYPE_ENUM_LL_SSP_DIRECTION  dir;
    /*! dma rx tx data interrupt en                                             */
    FunctionalState             dma_ie;
} TYPE_LL_SPI_DMA_CFG;

/**
  * @brief SPI low layer initialization structure
  */
typedef struct __ll_spi_init {
    /*! Configure the number of bits of data sent by the SPI module each time.  */
    TYPE_ENUM_LL_SPI_FRAME_SIZE    frame_size;
    /*! Configure the SPI module's wire mode.                                   */
    TYPE_ENUM_LL_SPI_WIRE_MODE     wire_mode;
    /*! Configure the data sampling mode of the SPI module.                     */
    TYPE_ENUM_LL_SPI_MODE          spi_mode;
    /*! Configure the working mode of the SPI module.                           */
    TYPE_ENUM_LL_SSP_WORK_MODE     work_mode;
    /*!SPI MASTER MODE,capture serial data delay cycle                          */
    u16                            delay_cycle_cnt;
    /*! data baud                                                               */
    u16                            baud;
    /*! spi cs control                                                          */
    FunctionalState                cs_en;
    /*! spi cs rising edge detected interrupt en                                */
    FunctionalState                cs_rising_ie;
    /*! rx tx finish a frame of data interrupt en                               */
    FunctionalState                frame_ie;
    /*! buf overflow interrupt en                                               */
    FunctionalState                fifo_ov_ie;
    /*! rx buf not empty interrupt en                                           */
    FunctionalState                rfifo_not_empty_ie;
    /*! tx buf not full interrupt en                                            */
    FunctionalState                tfifo_not_full_ie;
} TYPE_LL_SPI_INIT;



/**
  * @}
  */

/** @defgroup IIC_Exported_Struct_Typedefs IIC Exported Struct Typedefs
  * @{
  */

/**
  * @brief IIC low layer initialization structure
  */
typedef struct __ll_iic_init {
    /*! data baud                                                               */
    u16                           baud;
    /*! Configure the working mode of the IIC module.                           */
    TYPE_ENUM_LL_SSP_WORK_MODE    work_mode;
    /*! arbitrament interrupt en                                                */
    FunctionalState               al_ie;
    /*! rx stop interrupt en                                                    */
    FunctionalState               stop_ie;
    /*! rx tx a frame of data interrupt en                                      */
    FunctionalState               frame_ie;
    /*! buf overflow interrupt en                                               */ 
    FunctionalState               fifo_ov_ie;
    /*! rx buf not empty interrupt en                                           */
    FunctionalState               rfifo_not_empty_ie;
    /*! tx buf not full interrupt en                                            */
    FunctionalState               tfifo_not_full_ie;
} TYPE_LL_IIC_INIT;


/**
  * @brief IIC low layer dma initialization configuration structure
  */
typedef struct {
    /*! dma rx tx data buf address                                              */
    u32                dma_addr;
    /*!  dma rx tx data size                                                    */
    u16                dma_size;
    /*! dma rx tx direction                                                     */
    TYPE_ENUM_LL_SSP_DIRECTION dir;
    /*! dma rx tx data interrupt en                                             */
    FunctionalState    dma_ie;
} TYPE_IIC_DMA_CFG;

/**
  * @brief IIC low layer slave initialization configuration structure
  */
typedef struct {
    /*! slave address                                                          */
    u16                           slave_addr;
    /*! address width                                                          */
    TYPE_ENUM_LL_IIC_ADDR_WIDTH   addr_width;
    /*! receive nack interrupt en                                              */
    FunctionalState               nack_ie;
    /*! receive broadcast en                                                   */
    FunctionalState               broadcast_en;
    /*! receive broadcase interrupt en                                         */
    FunctionalState               broadcast_ie;
    /*! address match interrupt en                                             */
    FunctionalState               addr_match_ie;
} TYPE_IIC_SLAVE_CFG;

/**
  * @}
  */

/**
  * @}
  */

/** @defgroup SPI_IIC_LL_Interrupt SPI_IIC LL Interrupt Handle function
  * @ingroup  SPI_IIC_LL_Driver
  * @brief   SPI_IIC LL Interrupt Handle function
  *
@verbatim   
  ===============================================================================
                        Interrupt Handle function
  ===============================================================================  

    This subsection provides a set of functions allowing to manage the SPI_IIC  
    Interrupt Handle function.

    how to use?

@endverbatim
  *
  * @{
  */


/**
  * @}
  */
  
/** @defgroup SPI_IIC_LL_Init_Cfg SPI_IIC LL Initialization And Configuration
  * @ingroup  SPI_IIC_LL_Driver
  * @brief    SPI_IIC LL Initialization And Configuration
  *
@verbatim   
  ===============================================================================
                        Initialization And Configuration
  ===============================================================================  

    This subsection provides a set of functions allowing to manage the SPI_IIC data 
    Initialization and Configuration.
    
    how to use?

@endverbatim
  *
  * @{
  */
  
/**
  * @brief  Link layer SPI initialization function
  * @param  p_spi: The structure pointer of the SPI is selected.
  * @param  p_init : SPI initialization struct
  * @retval None.
  */
void ll_spi_init(SPI_I2C_TypeDef *p_spi, TYPE_LL_SPI_INIT *p_init);

/**
  * @brief  Link layer SPI detele initialization function
  * @param  p_spi: The structure pointer of the SPI is selected.
  * @retval None.
  */
void ll_spi_deinit(SPI_I2C_TypeDef *p_spi);

/**
  * @brief  Pull up the chip select(CS) pins of the SPI module.
  * @param  p_spi: SPI module pointer.
  * @retval None
  * @note   Only valid in master mode.
  */
void ll_spi_cs_set(SPI_I2C_TypeDef *p_spi);

/**
  * @brief  Pull down the chip select(CS) pins of the SPI module.
  * @param  p_spi: SPI module pointer.
  * @retval None
  * @note   Only valid in master mode.
  */
void ll_spi_cs_clr(SPI_I2C_TypeDef *p_spi);

/**
  * @brief  Get the wire mode of the current SPI module
  * @param  p_spi: SPI module pointer
  * @retval TYPE_ENUM_LL_SPI_WIRE_MODE
  */
TYPE_ENUM_LL_SPI_WIRE_MODE ll_spi_wire_mode_get(SPI_I2C_TypeDef *p_spi);

/**
  * @brief  Set the SPI module's wire mode
  * @param  p_spi: SPI module pointer
  * @param  wire_mode: The wire mode to be set by the SPI module
  * @retval None
  */
void ll_spi_wire_mode_set(SPI_I2C_TypeDef *p_spi, TYPE_ENUM_LL_SPI_WIRE_MODE wire_mode);

/**
  * @brief  Link layer SPI DMA config function
  * @param  p_spi: The structure pointer of the SPI is selected
  * @param  p_cfg  : SPI Configuration struct
  * @retval None
  */
void ll_spi_dma_config(SPI_I2C_TypeDef *p_spi, TYPE_LL_SPI_DMA_CFG *p_cfg);


/**
  * @brief  Link layer SPI or IIC fifo empty
  * @param  p_spi: SPI or IIC group address
  * @retval true or false
  */
bool ll_spi_iic_fifo_empty(SPI_I2C_TypeDef *p_spi);

/**
  * @brief  Link layer SPI or IIC fifo full
  * @param  p_spi: SPI or IIC group address
  * @retval true or false
  */
bool ll_spi_iic_fifo_full(SPI_I2C_TypeDef *p_spi);

/**
  * @brief  Link layer IIC initialization function
  * @param  p_iic: The structure pointer of the IIC is selected.
  * @param  p_init : IIC initialization struct
  * @retval None.
  */
void ll_iic_init(SPI_I2C_TypeDef *p_iic, TYPE_LL_IIC_INIT *p_init);


/** 
  * @brief  Link layer IIC detele initialization function
  * @param  p_iic: The structure pointer of the IIC is selected.
  * @retval None.
  */
void ll_iic_deinit(SPI_I2C_TypeDef *p_iic);

/**
  * @brief  Link layer IIC DMA config function
  * @param  p_iic: The structure pointer of the IIC is selected
  * @param  p_cfg  : IIC Configuration struct
  * @retval None
  */
void ll_iic_dma_irq_config(SPI_I2C_TypeDef *p_iic, TYPE_IIC_DMA_CFG *p_cfg);

/**
  * @brief  Link layer IIC slave config function
  * @param  p_iic: The structure pointer of the IIC is selected
  * @param  p_cfg  : IIC Configuration struct
  * @retval None
  */
void ll_iic_slave_mode_config(SPI_I2C_TypeDef *p_iic, TYPE_IIC_SLAVE_CFG *p_cfg);

/**
  * @brief  IIC line if busy
  * @param  p_iic: IIC module pointer
  * @retval true or false
  */
bool ll_iic_bus_is_busy(SPI_I2C_TypeDef *p_iic);

/**
  * @brief  IIC arbitration if lost(multiple master)
  * @param  p_iic: IIC module pointer
  * @retval true or false
  */
bool ll_iic_arbitration_is_lost(SPI_I2C_TypeDef *p_iic);

/**
  * @brief  IIC master tx 1 byte data
  * @param  p_iic: IIC module pointer
  * @param  data: data of tx
  * @param  flag: flag of stop bit or start bit
  * @retval none
  */
void ll_iic_master_tx_byte(SPI_I2C_TypeDef *p_iic, u8 data, u8 flag);

/**
  * @brief  IIC master rx 1 byte data
  * @param  p_iic: IIC module pointer
  * @param  flag: flag of ack, nack, stop bit, or start bit
  * @retval 1 byte data of rx
  */
u8 ll_iic_master_rx_byte(SPI_I2C_TypeDef *p_iic, u8 flag);

/**
  * @brief  IIC master tx data from buf(tx one data of buf can not tx start sign and stop sign)
  * @param  p_iic: IIC module pointer
  * @param  buf: buf of tx data
  * @param  num: num of tx data
  * @retval none
  */
void ll_iic_master_buf_tx(SPI_I2C_TypeDef *p_iic, u8 *buf, u32 num);

/**
  * @brief  IIC master rx data to buf(rx one data of buf can not tx nack sign, start sign, and stop sign)
  * @param  p_iic: IIC module pointer
  * @param  buf: buf of rx data
  * @param  num: num of rx data
  * @retval none
  */
void ll_iic_master_buf_rx(SPI_I2C_TypeDef *p_iic, u8 *buf, u32 num);

/**
  * @brief  IIC slave address response judge(if address matched, and write or read direction)
  * @param  p_iic: IIC module pointer
  * @retval TYPE_ENUM_LL_IIC_ADDR_RESPONSE
  */
TYPE_ENUM_LL_IIC_ADDR_RESPONSE ll_iic_slave_addr_response(SPI_I2C_TypeDef *p_iic);

/**
  * @brief  IIC slave rx broadcase judge
  * @param  p_iic: IIC module pointer
  * @retval true or false
  */
bool ll_iic_slave_rx_broadcast(SPI_I2C_TypeDef *p_iic);

/**
  * @brief  IIC get ack state
  * @param  p_iic: IIC module pointer
  * @retval TYPE_ENUM_LL_IIC_ACK
  */
TYPE_ENUM_LL_IIC_ACK ll_iic_get_ack_state(SPI_I2C_TypeDef *p_iic);

/**
  * @brief  IIC slave rx 1 byte data
  * @param  p_iic: IIC module pointer
  * @retval 1 byte data
  */
u8 ll_iic_slave_rx_byte(SPI_I2C_TypeDef *p_iic);

/**
  * @brief  IIC slave rx 1 byte data
  * @param  p_iic: IIC module pointer
  * @retval 1 byte data
  */
u8 ll_iic_slave_rx_byte(SPI_I2C_TypeDef *p_iic);

/**
  * @brief  IIC slave tx 1 byte data
  * @param  p_iic: IIC module pointer
  * @param  data: 1 byte data
  * @retval none
  */
void ll_iic_slave_tx_byte(SPI_I2C_TypeDef *p_iic, u8 data);

/**
  * @}
  */
  
/** @defgroup SPI_IIC_LL_Data_Transfers SPI_IIC LL Data transfers functions
  * @ingroup  SPI_IIC_LL_Driver
  * @brief    SPI_IIC LL Data transfers functions 
  *
@verbatim   
  ===============================================================================
                            Data transfers functions
  ===============================================================================  

    This subsection provides a set of functions allowing to manage the SPI_IIC data 
    transfers and receive.
  
@endverbatim
  *
  * @{
  */


  /**
  * @brief  Link layer SSP DMA finish interrupt enable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_dma_interrupt_enable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP DMA finish interrupt disable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_dma_interrupt_disable(SPI_I2C_TypeDef *p_ssp);



  /**
  * @brief  Link layer SSP DMA finish interrupt get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_DMA_INTERRUPT_GET(p_ssp)                      ((p_ssp)->CON1 & LL_SSP_CON1_DMA_IE)

  /**
  * @brief  Link layer SSP buf overflow data lost interrupt enable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_fifo_ov_interrupt_enable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP buf overflow data lost interrupt disable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_iic_fifo_ov_interrupt_disable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP buf overflow data lost interrupt get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_FIFO_OV_INTERRUPT_GET(p_ssp)                  ((p_ssp)->CON1 & LL_SSP_CON1_FIFO_OV_IE)

  /**
  * @brief  Link layer SSP receive buf not empty interrupt enable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_rfifo_not_empty_interrupt_enable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP receive buf not empty interrupt disable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_rfifo_not_empty_interrupt_disable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP receive buf not empty interrupt get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_RFIFO_NOT_EMPTY_INTERRUPT_GET(p_ssp)          ((p_ssp)->CON1 & LL_SSP_CON1_RFIFO_NOT_EMPTY_IE)

  /**
  * @brief  Link layer SSP send buf not full interrupt enable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_tfifo_not_full_interrupt_enable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP send buf not full interrupt disable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_tfifo_not_full_interrupt_disable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP send buf not full interrupt get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_TFIFO_NOT_FULL_INTERRUPT_GET(p_ssp)           ((p_ssp)->CON1 & LL_SSP_CON1_TFIFO_NOT_FULL_IE)

  /**
  * @brief  Link layer SSP interrupt enable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_interrupt_enable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP interrupt disable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_interrupt_disable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP interrupt get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_INTERRUPT_GET(p_ssp)                          ((p_ssp)->CON1 & LL_SSP_CON1_DONE_IE)


  /**
  * @brief  Link layer SPI cs rising edge interrupt enable
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval None
  */
void ll_spi_cs_rising_edge_interrupt_enable(SPI_I2C_TypeDef *p_spi);

  /**
  * @brief  Link layer SPI cs rising edge interrupt disable
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval None
  */
void ll_spi_cs_rising_edge_interrupt_disable(SPI_I2C_TypeDef *p_spi);

  /**
  * @brief  Link layer SPI cs rising edge interrupt get
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval result
  */
#define LL_SPI_CS_RISING_EDGE_INTERRUPT_GET(p_spi)               ((p_spi)->CON0 & LL_SPI_CON0_CS_RISING_EDGE_IE)



  /**
  * @brief  Link layer IIC rx nack interrupt enable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_rx_nack_interrupt_enable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC rx nack interrupt disable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_rx_nack_interrupt_disable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC rx nack interrupt get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_RX_NACK_INTERRUPT_GET(p_iic)                      ((p_iic)->CON0 & LL_IIC_CON0_NACK_IE)

  /**
  * @brief  Link layer IIC master arbitration lost interrupt enable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_al_interrupt_enable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC master arbitration lost interrupt disable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_al_interrupt_disable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC master arbitration lost interrupt get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_AL_INTERRUPT_GET(p_iic)                           ((p_iic)->CON0 & LL_IIC_CON0_AL_IE)

  /**
  * @brief  Link layer IIC master or slave detected stop signal interrupt enable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_stop_interrupt_enable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC master or slave detected stop signal interrupt disable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_stop_interrupt_disable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC master or slave detected stop signal interrupt get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_STOP_INTERRUPT_GET(p_iic)                         ((p_iic)->CON0 & LL_IIC_CON0_STOP_IE)

  /**
  * @brief  Link layer IIC slave address matched interrupt enable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_addr_match_interrupt_enable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC slave address matched interrupt disable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_addr_match_interrupt_disable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC slave address matched interrupt get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_ADDR_MATCH_INTERRUPT_GET(p_iic)                   ((p_iic)->CON0 & LL_IIC_CON0_ADDR_MATCH_IE)

  /**
  * @brief  Link layer IIC broadcast interrupt enable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_broadcast_interrupt_enable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC broadcast interrupt disable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_broadcast_interrupt_disable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC broadcast interrupt get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_BROADCAST_INTERRUPT_GET(p_iic)                    ((p_iic)->CON0 & LL_IIC_CON0_BROADCAST_IE)


  /**
  * @brief  Link layer SSP DMA enable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_dma_enable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP DMA disable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_dma_disable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP DMA enable get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_DMA_EN_GET(p_ssp)                             ((p_ssp)->CON1 & LL_SSP_CON1_DMA_EN)

  /**
  * @brief  Link layer SSP DMA enable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_tx_enable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP tx disable rx disable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_tx_disable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP tx disable rx enable get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_TX_EN_GET(p_ssp)                             ((p_ssp)->CON1 & LL_SSP_CON1_TX_EN)

  /**
  * @brief  Link layer SSP module enable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_enable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP module disable
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
void ll_spi_iic_disable(SPI_I2C_TypeDef *p_ssp);

  /**
  * @brief  Link layer SSP module enable get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_EN_GET(p_ssp)                                ((p_ssp)->CON1 & LL_SSP_CON1_EN)

  /**
  * @brief  Link layer SPI cs enable
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval None
  */
void ll_spi_cs_enable(SPI_I2C_TypeDef *p_spi);

  /**
  * @brief  Link layer SPI cs disable
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval None
  */
void ll_spi_cs_disable(SPI_I2C_TypeDef *p_spi);

  /**
  * @brief  Link layer SPI cs enable get
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval result
  */
#define LL_SPI_CS_EN_GET(p_spi)                                ((p_spi)->CON0 & LL_SPI_CON0_CS_EN)

  /**
  * @brief  Link layer SPI slave sync enable
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval None
  */
void ll_spi_slave_sync_enable(SPI_I2C_TypeDef *p_spi);

  /**
  * @brief  Link layer SPI slave sync disable
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval None
  */
void ll_spi_slave_sync_disable(SPI_I2C_TypeDef *p_spi);

  /**
  * @brief  Link layer SPI slave sync enable get
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval result
  */
#define LL_SPI_SLAVE_SYNC_EN_GET(p_spi)                        ((p_spi)->CON0 & LL_SPI_CON0_SLAVE_SYNC_EN)

  /** 
  * @brief  Link layer SPI master sync enable
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval None
  */
void ll_spi_master_sync_enable(SPI_I2C_TypeDef *p_spi);

  /**
  * @brief  Link layer SPI master sync disable
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval None
  */
void ll_spi_master_sync_disable(SPI_I2C_TypeDef *p_spi);

  /**
  * @brief  Link layer SPI master sync enable get
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval result
  */
#define LL_SPI_MASTER_SYNC_EN_GET(p_spi)                       ((p_spi)->CON0 & LL_SPI_CON0_MASTER_SYNC_EN)

  /**
  * @brief  Link layer IIC broadcast enable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_broadcast_enable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC broadcast disable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_broadcast_disable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC broadcast en get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_BROADCAST_EN_GET(p_iic)                            ((p_iic)->CON0 & LL_IIC_CON0_BROADCAST_EN)

  /**
  * @brief  Link layer IIC response nack enable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_tx_nack_enable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC response nack disable
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
void ll_iic_tx_nack_disable(SPI_I2C_TypeDef *p_iic);

  /**
  * @brief  Link layer IIC response nack enable get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_TX_NACK_EN_GET(p_iic)                            ((p_iic)->CON0 & LL_IIC_CON0_TX_NACK_EN)


  /**
  * @brief  Link layer SSP module busy pending get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_BUSY_PENDING_GET(p_ssp)                           ((p_ssp)->STA & LL_SSP_STA_BUSY_PENDING)

  /**
  * @brief  Link layer SSP module DMA done pending get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_DMA_DONE_PENDING_GET(p_ssp)                       ((p_ssp)->STA & LL_SSP_STA_DMA_DONE_PENDING)

  /**
  * @brief  Link layer SSP module DMA done pending clr
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
#define LL_SPI_IIC_DMA_DONE_PENDING_CLR(p_ssp)                       ((p_ssp)->STA = LL_SSP_STA_DMA_DONE_PENDING)

  /**
  * @brief  Link layer SSP module Buffer overflowed and data was lost pending get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_FIFO_OV_PENDING_GET(p_ssp)                        ((p_ssp)->STA & LL_SSP_STA_FIFO_OV_PENDING)

  /**
  * @brief  Link layer SSP module Buffer overflowed and data was lost pending clr
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
#define LL_SPI_IIC_FIFO_OV_PENDING_CLR(p_ssp)                        ((p_ssp)->STA = LL_SSP_STA_FIFO_OV_PENDING)

  /**
  * @brief  Link layer SSP module Buffer empty pending get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_FIFO_EMPTY_PENDING_GET(p_ssp)                     ((p_ssp)->STA & LL_SSP_STA_FIFO_EMPTY_PENDING)

  /**
  * @brief  Link layer SSP module Buffer full pending get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_FIFO_FULL_PENDING_GET(p_ssp)                      ((p_ssp)->STA & LL_SSP_STA_FIFO_FULL_PENDING)

  /**
  * @brief  Link layer SSP module done pending get
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval result
  */
#define LL_SPI_IIC_DONE_PENDING_GET(p_ssp)                           ((p_ssp)->STA & LL_SSP_STA_DONE_PENDING)

  /**
  * @brief  Link layer SSP module done pending clr
  * @param  p_ssp: The structure pointer of the SPI or IIC is selected
  * @retval None
  */
#define LL_SPI_IIC_DONE_PENDING_CLR(p_ssp)                           ((p_ssp)->STA = LL_SSP_STA_DONE_PENDING)

  /**
  * @brief  Link layer SPI the cs rising edge pending get
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval result
  */
#define LL_SPI_CS_RISING_EDGE_PENDING_GET(p_spi)                 ((p_spi)->STA & LL_SPI_STA_CS_RISING_EDGE_PENDING)

  /**
  * @brief  Link layer SPI the  cs rising edge pending get
  * @param  p_spi: The structure pointer of the SPI is selected
  * @retval None
  */
#define LL_SPI_CS_RISING_EDGE_PENDING_CLR(p_spi)                 ((p_spi)->STA = LL_SPI_STA_CS_RISING_EDGE_PENDING)

  /**
  * @brief  Link layer IIC master rx busy pending get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_MASTER_RX_BUSY_PENDING_GET(p_iic)                 ((p_iic)->STA & LL_IIC_STA_MASTER_RX_BUSY_PENDING)

  /**
  * @brief  Link layer IIC bus busy pending get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_BUS_BUSY_PENDING_GET(p_iic)                       ((p_iic)->STA & LL_IIC_STA_BUS_BUSY_PENDING)

  /**
  * @brief  Link layer IIC detected arbitration loss pending get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_AL_PENDING_GET(p_iic)                             ((p_iic)->STA & LL_IIC_STA_AL_PENDING)

  /**
  * @brief  Link layer IIC detected arbitration loss pending clr
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
#define LL_IIC_AL_PENDING_CLR(p_iic)                             ((p_iic)->STA = LL_IIC_STA_AL_PENDING)

  /**
  * @brief  Link layer IIC detected a STOP bit on the line pending get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_STOP_PENDING_GET(p_iic)                           ((p_iic)->STA & LL_IIC_STA_STOP_PENDING)

  /**
  * @brief  Link layer IIC detected a STOP bit on the line pending clr
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
#define LL_IIC_STOP_PENDING_CLR(p_iic)                           ((p_iic)->STA = LL_IIC_STA_STOP_PENDING)

  /**
  * @brief  Link layer IIC receiving the correct slave address sent from the host pending get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_ADDR_MATCH_PENDING_GET(p_iic)                     ((p_iic)->STA & LL_IIC_STA_ADDR_MATCH_PENDING)

  /**
  * @brief  Link layer IIC receiving the correct slave address sent from the host pending clr
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
#define LL_IIC_ADDR_MATCH_PENDING_CLR(p_iic)                     ((p_iic)->STA = LL_IIC_STA_ADDR_MATCH_PENDING)

  /**
  * @brief  Link layer IIC the broadcast address marker is detected pending get
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval result
  */
#define LL_IIC_BROADCAST_PENDING_GET(p_iic)                      ((p_iic)->STA & LL_IIC_STA_BROADCAST_PENDING)

  /**
  * @brief  Link layer IIC the broadcast address marker is detected pending clr
  * @param  p_iic: The structure pointer of the IIC is selected
  * @retval None
  */
#define LL_IIC_BROADCAST_PENDING_CLR(p_iic)                      ((p_iic)->STA = LL_IIC_STA_BROADCAST_PENDING)






/**
  * @}
  */

/**
  * @}
  */

#ifdef __cplusplus
}
#endif

/**
  * @}
  */

/**
  * @}
  */

#endif //__TS32FX_LL_SPI_IIC_H

/*************************** (C) COPYRIGHT 2018 TOPSYS ***** END OF FILE *****/
